1. Technical Field
The present invention relates to a circuit and method for detecting a synchronous mode in a semiconductor memory apparatus, and in particular, to a circuit and method for detecting a synchronous mode in a semiconductor memory apparatus capable of distinguishing a synchronous mode, in which a clock is input, and an asynchronous mode, in which a clock is not input, from each other.
2. Related Art
A semiconductor memory apparatus, such as a pseudo SRAM provided in a mobile communication terminal or the like, operates by selectively using a clock. That is, the clock is selectively input according to when a clock is necessary and when the clock is unnecessary. Then, when the clock is input, individual circuits provided in the semiconductor memory apparatus need to judge whether or not the clock is input.
However, a known semiconductor memory apparatus does not easily judge a synchronous mode where the clock is input and an asynchronous mode where the clock is not input. Accordingly, there is a technical limitation to apply an advanced technology to such a semiconductor memory apparatus.